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Kernel: Expose size of L1 data/instruction, L2, and L3 CPU caches :^)
These are added as properties of the "caches" object to each processor, if available.
This commit is contained in:
committed by
Andreas Kling
parent
5c79681611
commit
20e2e39fcc
@@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2022, Linus Groh <linusg@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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@@ -639,6 +640,27 @@ private:
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TRY(obj.add("type", info.type()));
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TRY(obj.add("brand", info.brand_string()));
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auto caches = TRY(obj.add_object("caches"));
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auto add_cache_info = [&](StringView name, ProcessorInfo::Cache const& cache) -> ErrorOr<void> {
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auto cache_object = TRY(caches.add_object(name));
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TRY(cache_object.add("size", cache.size));
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TRY(cache_object.add("line_size", cache.line_size));
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TRY(cache_object.finish());
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return {};
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};
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if (info.l1_data_cache().has_value())
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TRY(add_cache_info("l1_data", *info.l1_data_cache()));
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if (info.l1_data_cache().has_value())
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TRY(add_cache_info("l1_instruction", *info.l1_instruction_cache()));
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if (info.l1_data_cache().has_value())
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TRY(add_cache_info("l2", *info.l2_cache()));
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if (info.l1_data_cache().has_value())
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TRY(add_cache_info("l3", *info.l3_cache()));
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TRY(caches.finish());
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TRY(obj.finish());
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return {};
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}));
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