From 519be6e6265e070adce03772f2b2c0db700fbb09 Mon Sep 17 00:00:00 2001
From: Idan Horowitz <idan.horowitz@gmail.com>
Date: Mon, 22 Apr 2024 13:46:20 +0300
Subject: [PATCH] Kernel: Use correctly-sized read when checking PCI host
 bridge function

We were accidentally doing a 16-bit read instead of an 8-bit read,
meaning we would also read the 'CACHE_LINE_SIZE' field immediately
following it, and never actually continue.
---
 Kernel/Bus/PCI/Controller/HostController.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Kernel/Bus/PCI/Controller/HostController.cpp b/Kernel/Bus/PCI/Controller/HostController.cpp
index ba97d1ee7e..588fadb96d 100644
--- a/Kernel/Bus/PCI/Controller/HostController.cpp
+++ b/Kernel/Bus/PCI/Controller/HostController.cpp
@@ -121,7 +121,7 @@ UNMAP_AFTER_INIT void HostController::enumerate_attached_devices(Function<Iterat
         for (int bus_as_function_number = 1; bus_as_function_number < 8; ++bus_as_function_number) {
             if (read16_field(0, 0, bus_as_function_number, PCI::RegisterOffset::VENDOR_ID) == PCI::none_value)
                 continue;
-            if (read16_field(0, 0, bus_as_function_number, PCI::RegisterOffset::CLASS) != 0x6)
+            if (read8_field(0, 0, bus_as_function_number, PCI::RegisterOffset::CLASS) != 0x6)
                 continue;
             if (Checked<u8>::addition_would_overflow(m_domain.start_bus(), bus_as_function_number))
                 break;