mirror of
https://github.com/fergalmoran/ladybird.git
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2bba9411ca
We have many places in the kernel code that we have boolean flags that are only set once, and never reset again but are checked multiple times before and after the time they're being set, which matches the purpose of the SetOnce class.
276 lines
11 KiB
C++
276 lines
11 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/ByteReader.h>
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#include <AK/Error.h>
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#include <AK/HashTable.h>
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#if ARCH(X86_64)
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# include <Kernel/Arch/x86_64/PCI/Controller/HostBridge.h>
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#endif
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#include <Kernel/Bus/PCI/Access.h>
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#include <Kernel/Bus/PCI/Controller/MemoryBackedHostBridge.h>
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#include <Kernel/Bus/PCI/Initializer.h>
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#include <Kernel/Debug.h>
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#include <Kernel/Firmware/ACPI/Definitions.h>
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#include <Kernel/Memory/MemoryManager.h>
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#include <Kernel/Memory/Region.h>
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#include <Kernel/Memory/TypedMapping.h>
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#include <Kernel/Sections.h>
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namespace Kernel::PCI {
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#define PCI_MMIO_CONFIG_SPACE_SIZE 4096
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static Access* s_access;
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Access& Access::the()
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{
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if (s_access == nullptr) {
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VERIFY_NOT_REACHED(); // We failed to initialize the PCI subsystem, so stop here!
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}
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return *s_access;
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}
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bool Access::is_initialized()
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{
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return (s_access != nullptr);
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}
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bool Access::is_hardware_disabled()
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{
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return g_pci_access_io_probe_failed.was_set();
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}
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bool Access::is_disabled()
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{
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return g_pci_access_is_disabled_from_commandline.was_set() || g_pci_access_io_probe_failed.was_set();
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}
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UNMAP_AFTER_INIT bool Access::find_and_register_pci_host_bridges_from_acpi_mcfg_table(PhysicalAddress mcfg_table)
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{
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u32 length = 0;
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u8 revision = 0;
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{
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auto mapped_mcfg_table_or_error = Memory::map_typed<ACPI::Structures::SDTHeader>(mcfg_table);
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if (mapped_mcfg_table_or_error.is_error()) {
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dbgln("Failed to map MCFG table");
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return false;
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}
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auto mapped_mcfg_table = mapped_mcfg_table_or_error.release_value();
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length = mapped_mcfg_table->length;
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revision = mapped_mcfg_table->revision;
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}
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if (length == sizeof(ACPI::Structures::SDTHeader))
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return false;
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dbgln("PCI: MCFG, length: {}, revision: {}", length, revision);
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if (Checked<size_t>::addition_would_overflow(length, PAGE_SIZE)) {
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dbgln("Overflow when adding extra page to allocation of length {}", length);
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return false;
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}
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length += PAGE_SIZE;
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auto region_size_or_error = Memory::page_round_up(length);
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if (region_size_or_error.is_error()) {
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dbgln("Failed to round up length of {} to pages", length);
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return false;
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}
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auto mcfg_region_or_error = MM.allocate_kernel_region(mcfg_table.page_base(), region_size_or_error.value(), "PCI Parsing MCFG"sv, Memory::Region::Access::ReadWrite);
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if (mcfg_region_or_error.is_error())
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return false;
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auto& mcfg = *(ACPI::Structures::MCFG*)mcfg_region_or_error.value()->vaddr().offset(mcfg_table.offset_in_page()).as_ptr();
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dbgln_if(PCI_DEBUG, "PCI: Checking MCFG @ {}, {}", VirtualAddress(&mcfg), mcfg_table);
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for (u32 index = 0; index < ((mcfg.header.length - sizeof(ACPI::Structures::MCFG)) / sizeof(ACPI::Structures::PCI_MMIO_Descriptor)); index++) {
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u8 start_bus = mcfg.descriptors[index].start_pci_bus;
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u8 end_bus = mcfg.descriptors[index].end_pci_bus;
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u64 start_addr = mcfg.descriptors[index].base_addr;
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Domain pci_domain { index, start_bus, end_bus };
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dmesgln("PCI: New PCI domain @ {}, PCI buses ({}-{})", PhysicalAddress { start_addr }, start_bus, end_bus);
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auto host_bridge = MemoryBackedHostBridge::must_create(pci_domain, PhysicalAddress { start_addr });
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add_host_controller(move(host_bridge));
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}
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return true;
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}
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UNMAP_AFTER_INIT bool Access::initialize_for_multiple_pci_domains(PhysicalAddress mcfg_table)
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{
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VERIFY(!Access::is_initialized());
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auto* access = new Access();
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if (!access->find_and_register_pci_host_bridges_from_acpi_mcfg_table(mcfg_table))
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return false;
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access->rescan_hardware();
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dbgln_if(PCI_DEBUG, "PCI: access for multiple PCI domain initialised.");
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return true;
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}
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#if ARCH(X86_64)
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UNMAP_AFTER_INIT bool Access::initialize_for_one_pci_domain()
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{
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VERIFY(!Access::is_initialized());
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auto* access = new Access();
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auto host_bridge = HostBridge::must_create_with_io_access();
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access->add_host_controller(move(host_bridge));
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access->rescan_hardware();
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dbgln_if(PCI_DEBUG, "PCI: access for one PCI domain initialised.");
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return true;
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}
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#endif
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ErrorOr<void> Access::add_host_controller_and_scan_for_devices(NonnullOwnPtr<HostController> controller)
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{
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SpinlockLocker locker(m_access_lock);
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SpinlockLocker scan_locker(m_scan_lock);
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auto domain_number = controller->domain_number();
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VERIFY(!m_host_controllers.contains(domain_number));
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// Note: We need to register the new controller as soon as possible, and
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// definitely before enumerating devices behind that.
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m_host_controllers.set(domain_number, move(controller));
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m_host_controllers.get(domain_number).value()->enumerate_attached_devices([&](EnumerableDeviceIdentifier const& device_identifier) {
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auto device_identifier_or_error = DeviceIdentifier::from_enumerable_identifier(device_identifier);
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if (device_identifier_or_error.is_error()) {
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dmesgln("Failed during PCI Access::rescan_hardware due to {}", device_identifier_or_error.error());
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VERIFY_NOT_REACHED();
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}
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m_device_identifiers.append(device_identifier_or_error.release_value());
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});
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return {};
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}
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UNMAP_AFTER_INIT void Access::add_host_controller(NonnullOwnPtr<HostController> controller)
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{
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auto domain_number = controller->domain_number();
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m_host_controllers.set(domain_number, move(controller));
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}
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UNMAP_AFTER_INIT Access::Access()
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{
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s_access = this;
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}
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UNMAP_AFTER_INIT void Access::configure_pci_space(FlatPtr mmio_32bit_base, u32 mmio_32bit_size, FlatPtr mmio_64bit_base, u64 mmio_64bit_size)
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{
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SpinlockLocker locker(m_access_lock);
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SpinlockLocker scan_locker(m_scan_lock);
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FlatPtr mmio_32bit_end = mmio_32bit_base + mmio_32bit_size;
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FlatPtr mmio_64bit_end = mmio_64bit_base + mmio_64bit_size;
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for (auto& [_, host_controller] : m_host_controllers)
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host_controller->configure_attached_devices(mmio_32bit_base, mmio_32bit_end, mmio_64bit_base, mmio_64bit_end);
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}
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UNMAP_AFTER_INIT void Access::rescan_hardware()
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{
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SpinlockLocker locker(m_access_lock);
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SpinlockLocker scan_locker(m_scan_lock);
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VERIFY(m_device_identifiers.is_empty());
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for (auto& [_, host_controller] : m_host_controllers) {
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host_controller->enumerate_attached_devices([this](EnumerableDeviceIdentifier const& device_identifier) {
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auto device_identifier_or_error = DeviceIdentifier::from_enumerable_identifier(device_identifier);
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if (device_identifier_or_error.is_error()) {
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dmesgln("Failed during PCI Access::rescan_hardware due to {}", device_identifier_or_error.error());
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VERIFY_NOT_REACHED();
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}
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m_device_identifiers.append(device_identifier_or_error.release_value());
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});
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}
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}
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ErrorOr<void> Access::fast_enumerate(Function<void(DeviceIdentifier const&)>& callback) const
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{
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// Note: We hold the m_access_lock for a brief moment just to ensure we get
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// a complete Vector in case someone wants to mutate it.
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Vector<NonnullRefPtr<DeviceIdentifier>> device_identifiers;
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{
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SpinlockLocker locker(m_access_lock);
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VERIFY(!m_device_identifiers.is_empty());
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TRY(device_identifiers.try_extend(m_device_identifiers));
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}
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for (auto const& device_identifier : device_identifiers) {
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callback(device_identifier);
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}
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return {};
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}
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DeviceIdentifier const& Access::get_device_identifier(Address address) const
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{
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for (auto& device_identifier : m_device_identifiers) {
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auto device_address = device_identifier->address();
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if (device_address.domain() == address.domain()
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&& device_address.bus() == address.bus()
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&& device_address.device() == address.device()
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&& device_address.function() == address.function()) {
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return device_identifier;
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}
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}
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VERIFY_NOT_REACHED();
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}
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void Access::write8_field(DeviceIdentifier const& identifier, u32 field, u8 value)
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{
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VERIFY(identifier.operation_lock().is_locked());
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SpinlockLocker locker(m_access_lock);
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VERIFY(m_host_controllers.contains(identifier.address().domain()));
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auto& controller = *m_host_controllers.get(identifier.address().domain()).value();
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controller.write8_field(identifier.address().bus(), identifier.address().device(), identifier.address().function(), field, value);
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}
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void Access::write16_field(DeviceIdentifier const& identifier, u32 field, u16 value)
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{
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VERIFY(identifier.operation_lock().is_locked());
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SpinlockLocker locker(m_access_lock);
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VERIFY(m_host_controllers.contains(identifier.address().domain()));
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auto& controller = *m_host_controllers.get(identifier.address().domain()).value();
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controller.write16_field(identifier.address().bus(), identifier.address().device(), identifier.address().function(), field, value);
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}
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void Access::write32_field(DeviceIdentifier const& identifier, u32 field, u32 value)
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{
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VERIFY(identifier.operation_lock().is_locked());
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SpinlockLocker locker(m_access_lock);
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VERIFY(m_host_controllers.contains(identifier.address().domain()));
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auto& controller = *m_host_controllers.get(identifier.address().domain()).value();
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controller.write32_field(identifier.address().bus(), identifier.address().device(), identifier.address().function(), field, value);
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}
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u8 Access::read8_field(DeviceIdentifier const& identifier, RegisterOffset field)
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{
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VERIFY(identifier.operation_lock().is_locked());
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return read8_field(identifier, to_underlying(field));
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}
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u16 Access::read16_field(DeviceIdentifier const& identifier, RegisterOffset field)
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{
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VERIFY(identifier.operation_lock().is_locked());
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return read16_field(identifier, to_underlying(field));
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}
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u8 Access::read8_field(DeviceIdentifier const& identifier, u32 field)
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{
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VERIFY(identifier.operation_lock().is_locked());
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SpinlockLocker locker(m_access_lock);
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VERIFY(m_host_controllers.contains(identifier.address().domain()));
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auto& controller = *m_host_controllers.get(identifier.address().domain()).value();
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return controller.read8_field(identifier.address().bus(), identifier.address().device(), identifier.address().function(), field);
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}
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u16 Access::read16_field(DeviceIdentifier const& identifier, u32 field)
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{
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VERIFY(identifier.operation_lock().is_locked());
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SpinlockLocker locker(m_access_lock);
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VERIFY(m_host_controllers.contains(identifier.address().domain()));
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auto& controller = *m_host_controllers.get(identifier.address().domain()).value();
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return controller.read16_field(identifier.address().bus(), identifier.address().device(), identifier.address().function(), field);
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}
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u32 Access::read32_field(DeviceIdentifier const& identifier, u32 field)
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{
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VERIFY(identifier.operation_lock().is_locked());
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SpinlockLocker locker(m_access_lock);
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VERIFY(m_host_controllers.contains(identifier.address().domain()));
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auto& controller = *m_host_controllers.get(identifier.address().domain()).value();
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return controller.read32_field(identifier.address().bus(), identifier.address().device(), identifier.address().function(), field);
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}
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}
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