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36f6351edc
This change can be actually seen as two logical changes, the first change is about to ensure we only read the ATA Status register only once, because if we read it multiple times, we acknowledge interrupts unintentionally. To solve this issue, we always use the alternate Status register and only read the original status register in the IRQ handler. The second change is how we handle interrupts - if we use DMA, we can just complete the request and return from the IRQ handler. For PIO mode, it's more complicated. For PIO write operation, after setting the ATA registers, we send out the data to IO port, and wait for an interrupt. For PIO read operation, we set the ATA registers, and wait for an interrupt to fire, then we just read from the data IO port.