Conrad Pankoff 072bf8cbb9 Kernel: Fix non-DMA writes to IDE drives ...

Our logic for using the ATA_CMD_CACHE_FLUSH functionality was a bit wrong,
and now it's better.

The ATA spec says these two things:

> The device shall enter the interrupt pending state when:
> 1) any command except a PIO data-in command reaches command completion
>    successfully;
> ...
> The device shall exit the interrupt pending state when:
> 1) the device is selected, BSY is cleared to zero, and the Status
>		 register is read;

This means that our sequence of actions was probably never going to work.
We were waiting in a loop checking the status register until it left the
busy state, _then_ waiting for an interrupt. Unfortunately by checking the
status register, we were _clearing_ the interrupt we were about to wait
for.

Now we just wait for the interrupt - we don't poll the status register at
all. This also means that once we get our `wait_for_irq` method sorted out
we'll spend a bunch less CPU time waiting for things to complete.

2019-08-12 13:25:59 +02:00

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