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This is a "quirk" I've observed on a Intel ICH7 test machine. Apparently we need to select the device (master or slave) before starting to work with the bus master register. It's very possible that other machines are requiring this step to happen before the DMA transfer can occur correctly. Also, when reading with DMA, we should set the transfer direction before clearing the interrupt status. For the sake of completeness, I added a few lines in places that I deemed it to be reasonable to clear the interrupt status there.
9.9 KiB
9.9 KiB